Regviz

Texas Instruments /CC26x0 /GPT3 /TBMATCHR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TBMATCHR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Texas Instruments/CC26x0/GPT1/TBMATCHR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TBMATCHR

Description

Timer B Match Register

When a GPT is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of TAMATCHR. Reads from this register return the current match value of Timer B and writes are ignored. In a 16-bit mode, bits 15:0 are used for the match value. Bits 31:16 are reserved in both cases.

Note : This register is updated internally (takes effect) based on TBMR.TBMRSU

Fields

TBMATCHR

TBMATCHR

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data